What is 3D exactly?
It can get confusing very quickly because there are a few technical terms being bandied about to describe the new transistor structure. Intel calls it generically 3D but technically it’s a Tri-Gate transistor (see image below). The traditional flat two-dimensional “planar” gate is replaced with a thin three-dimensional silicon fin that rises up vertically from the silicon substrate.
What’s a fin?
The gate wraps around the fin (see image below). The current is controlled by using a gate on each of the three sides of the fin–two on each side and one across the top–rather than just one on top, as is the case with the 2D planar transistor. Intel’s explanation here is simple and clear: “The additional control enables as much transistor current flowing as possible when the transistor is in the ‘on’ state (for performance), and as close to zero as possible when it is in the ‘off’ state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).”
Why is this important?
It’s necessary to sustain Moore’s Law–doubling the number of transistors on a silicon device every two years. As device dimensions become prohibitively small, cramming in transistors in the traditional two-dimensional fashion becomes impossible. So, 3D or vertical transistors become necessary. And Intel isn’t just talking about this theoretically, it’s going to manufacture chips based on these transistors.
How soon will Intel use this technology?
Intel is essentially a chip manufacturer. So when it announces a new technology it’s a not pie-in-the-sky idea. Intel’s next-generation “Ivy Bridge” processors (which will follow its current Sandy Bridge chips) will use this 3D transistor technology exclusively. In other words, Intel will quit making 2D transistors and move completely to 3D on Ivy Bridge. Ivy Bridge will go into commercial production at the end of this year and into large production volume in 2012.
What’s the significance is 22 nanometer?
Ivy Bridge will use 22-nanometer technology versus the 32-nanometer tech currently used on Sandy Bridge. In addition to the merits of 3D transistors described above, moving to a smaller geometries generally results in faster, more power efficient processors.
Does this mean faster chips?
Of course. But also more power-efficient designs. Intel’s biggest challenge going forward isn’t speed but power efficiency. The 3D transistors enable chips to operate at lower voltage with lower leakage, providing both improved performance and energy efficiency compared to previous Intel chips.
Will this allow Intel to compete more effectively in the smartphone and tablet world?
That’s the idea. U.K.-based ARM Holdings is Intel’s new nemesis. ARM chips power most of the world’s tablets and smartphones, chiefly because of their power efficiency. Intel’s 22nm 3D transistors provide up to a 37 percent performance increase at low voltage versus Intel’s 32nm planar transistors. “This gain means that the transistors are ideal for use in small handheld devices, which operate using less energy to ‘switch’ back and forth. Alternatively, the new transistors consume less than half the power when at the same performance as 2D planar transistors on 32nm chips,” according to Intel.